ECE 546 SPRING 2016
Instructor
José SchuttAiné (jesa@illinois.edu) – Office Hours Wednesday
34 pm, 5042 ECEB
Class Time
12 12:50 pm, MWF, 2013
ECEB
Textbooks  Required
W. J. Dally and J. W. Poulton, “Digital Systems
Engineering”, Cambridge University Press, 1998
Textbooks  Recommended
1. S. Hall
and H. Heck, Advanced Signal Integrity for HighSpeed Digital Designs.
IEEEJ.Wiley, 2009
2. Kyung Suk (Dan) Oh and Xingchao (Chuck) Yuan, HighSpeed Signaling: Jitter Modeling, Analysis, and Budgeting, Prentice Hall, 2012.
3. Madhavan Swaminathan and Ege Engin, Power Integrity Modeling and Design for Semiconductor and Systems, Prentice Hall, 2007.
Grading Policy
Homework 60% of total
Project 30% of total
Participation 10% of total
Homework Policy
Problems
are assigned every week and are due the following week at the end of the class
period. Homework is to be the student’s own work, not a
collaborative or plagiarized work. However, students are permitted and encouraged
to help one another by engaging in discussion of course material and approaches to solving
the homework problems. Homework solutions will be posted on the course
webpage.
Teaching Assistant
Da Wei (dawei1@illinois.edu)  Office Hours Monday 12 pm, 5034 ECEB
WWW Home Page
The course
internet home page can be found at http://emlab.illinois.edu/ece546
Office Hours
José SchuttAiné  Wednesday 34 pm  Room 5042 ECEB
ECE 546 SCHEDULE: SPRING 2016
Lect 
Date 

Topic 
Book 


1 
JAN 
W20 
Packaging and Levels of
integration 
Ch 1 & 2 


2 

F22 
Resistance, capacitance &
inductance 
3.13.2 


3 

M25 
Ideal transmission line 
3.3 


4 

W27 
Losses in transmission lines 
3.4 


5 

F29 
Nonuniform transmission lines 
3.4 


6 
FEB 
M1 
Coupledline analysis 
notes 


7 

W3 
Multiline analysis 
notes 
HW 1 due 

8 

F5 
MOS Transistors 
4.1, 4.2 


9 

M8 
CMOS Logic Circuits 
4.3 


10 

W10 
MOS Amplifiers 
notes 
HW 2 due 

11 

F12 
Integrated Circuits 
notes 


12 

M15 
Measurements of transmission
lines 
3.6 


13 

W17 
Network Parameters 
notes 
HW 3 due 

14 

F19 
Scattering Parameters 
notes 


15 

M22 
SParameter Analysis of Transmission Lines 
notes 


16 

W24 
Conductor
Nonidealities 
notes 
HW 4 due 

17 

F26 
Blackbox Macromodeling 
notes 


18 

M29 
Requirements for Physical Channels 
notes 


19 
MAR 
W2 
Circuit Synthesis from Macromodels 
notes 
HW 5 due 

20 

F4 
I/O Circuits and Models 
notes 


21 

M7 
MNA, SPICE, Latency Insertion Method 
notes 


22 

W9 
IBIS Modeling 
notes 
HW 6 due 



F11 
EOH – NO CLASS 



23 

M14 
XParameters 
notes 


24 

W16 
Package & parasitics 
3.7 
HW 7 due 

25 

F18 
Onchip interconnect issues 
4.4 




M21 
SPRING BREAK 



26 

M28 
Power supply network 
5.1 


27 

W30 
Onchip distribution 
5.3 
HW 8 due 

28 
APR 
F1 
Power supply distribution 
5.3 


29 

M4 
Bypass & decoupling
capacitors 
5.3 


30 

W6 
TSV and Interposers 

HW 9 due 

31 

F8 
Power supply noise 
6.2 


32 

M11 
Crosstalk noise in distributed
systems 
6.3 


33 

W13 
Dispersion, loss in distributed
circuits 
6.3 
HW 10 due 

34 

F15 
Measurement of noise 
notes 


35 

M18 
Jitter Basics 
notes 


36 

W20 
Eye Diagrams 
notes 
HW 11 due 

37 

F22 
Serial Communication Systems 
notes 


38 

M25 
Signaling convention 
7.1 


39 

W27 
Signaling over lumped media 
7.2 
HW 12 due 

40 

F29 
HighSpeed I/O Links 



41 
MAY 
M2 
Advanced Signaling Techniques 



42 

W4 
Equalization 





F13 
PROJECTS DUE 


