8:00 - 9:00 am Pacific
Keynote I - Meeting the Challenge of Building a Scalable Quantum Computer
Jim Held
Intel Corporation
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Session M1A - High-Speed Links I
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
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M1A.1. PCIe Gen-5 Design Challenges of High-Speed Servers [115]
Mallikarjun Vasa, Chen Ching-Huei, Kumar Sanjay, Ching-Huei Chen, Mutnury Bhyrav
Dell
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M1A.2. Measurement Uncertainty Propagation in the Validation of High-Speed Interconnects [24]
Cemil Geyik*, Michael Hill*, Zhichao Zhang*, Kemal Aygun*, Aberle James+
*Intel,
+ASU
-
M1A.3. Rx Equalization for a High-Speed Channel Based on Bayesian Active Learning Using Dropout [128]
Xianbo Yang**, Junyan Tang**, Hakki Torun*, Wiren Becker**, , Jose Hejase+, Madhavan Swaminathan*
*Georgia Tech,
+Nvidia,
**IBM
-
M1A.4. Post-Fec BER Performance Analysis for Multi-Stage PAM4 Systems [34]
Xiaoqing Dong+, Chunxing Huang*,
*Zhongzeling Electronics,
+Xilinx
-
Live Q&A1
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Session M1B - Advanced CAD I
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
-
M1B.1. Hyperparameter determination in multivariate macromodeling based on radial basis functions [72] (Student competition)
Alessandro Zanco, Stefano Grivet-Talocia
Politecnico di Torino
-
M1B.2. Augmented PEEC for direct time domain thermal and power estimation of Integrated Voltage Regulator Architectures arising in Heterogeneous Integration [2]
(Student competition)
Venkatesh Avula, Vanessa Smet, Yogendra Joshi, Madhavan Swaminathan
* Georgia Tech
-
M1B.3. Accelerated Boundary Element Modeling of Lossy Conductors in Layered Media with a Single-Source Surface Impedance Operator [80]
(Student competition)
Shashwat Sharma, Piero Triverio
University of Toronto
-
M1B.4. Predictor-Corrector Algorithm with Embedded Dimension Reduction for Uncertainty Quantification of MWCNT
On-Chip Interconnect Networks [87] (Student competition)
Surila Guglani, Sourajeet Roy
IIT Roorkee
- Live Q&A2
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10:20 - 10:30 am Pacific
Break
10:30 - 11:20 am Pacific
Tutorial I
11:20 - 11:30 am Pacific
Live Q&A1
11:30 am - 12:50 pm Pacific
Session M2A - Power Integrity
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- M2A.1. Extracting the Dynamic Current of a Power Delivery Network [65]
Heidi Barnes*, Steve Sandler**, Jack Carrel* *Keysight Technologies,
**Picotest
+Xilinx
- M2A.2. A Novel Multipin Gauss-Newton Method for Performance Evaluation of Decoupling Capacitors [92]
Ihsan Erdin*, Ram Achar** *Celestica,
Carleton University
- M2A.3. A Non-Random Exploration based Method for the Optimization of Capacitors in Power Delivery Networks [41]
Seunghyup Han, Madhavan Swaminathan Georgia Tech
- M2A.4. A Parallel-in-Time Circuit Simulator for Power Delivery Networks with Nonlinear Load Models [47]
Chung-Kuan Cheng*, Chia-Tung Ho*, Chao Jiao+, Xinyuan Wang*, Zhiyu Zeng+, Xin Zhan+, *UCSD,
+Cadence
- Live Q&A1
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10:30 - 11:20 am Pacific
Tutorial II
11:20 - 11:30 am Pacific
Live Q&A2
11:30 am - 12:50 pm Pacific
Session M2B - Applied Electromagnetics
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- M2B.1. High-Dimensional Uncertainty Quantification via Active and Rank-Adaptive Tensor Regression [30] (Student competition)
Zichang He, Zheng Zhang UCSB
- M2B.2. Analysis of the Influence of Roughness on the Propagation Constant of a Waveguide via Two Sparse Stochastic Methods [64] (Student competition)
Ruben Waeytens, Dries Bosman, Martijn Huynen, Michiel Gossye, Hendrik Rogier, Dries Vande Ginste+ Ghent University/Imec,
- M2B.3. On the Accuracy of Cross-Talk Modeling in High-Speed Digital Circuits Using the Accelerated Boundary Element Method [108]
Dongwei Li, Giacomo Bianconi , Swagato Chakraborty Mentor
- M2B.4. A Comparison of Finite vs. Infinite Plane Models of Reference Conductors in Electronic Packages [105]
Yiru Jeong, Ali Yilmaz UT Austin
- Live Q&A2
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12:50 - 1:00 pm Pacific
Day 1 Wrap Up
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8:00 - 9:00 am Pacific
Keynote II - High Speed and Large Bandwidth Server Computer Bus Links: Past Milestones, Current State of The Art and Future Directions
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Session T1A - High-Speed Links II
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- T1A.1. Via Design Optimization for High Speed Differential Interconnects on Circuit Boards [46]
Armen Vardapetyan, Ong Chong-Jin Intel Corporation
- T1A.2. Signal Integrity Characterization of Channels With Asymmetric Via Stubs [44]
Yanyan Zhang, Mahesh Bohra, Nam Pham , Pavel Paladhi, Dale Becker, Daniel Dreps IBM
- T1A.3. High-Speed Link Design Optimization Using Machine Learning SVR-AS Method [93] (Student competition)
Hanzhi Ma+, Andreas C. Cangellaris*, Er-Ping Li+, Xu Chen* *UIUC,
+Zhejiang University
- T1A.4. ANN Performance for the Prediction of High-Speed Digital Interconnects over Multiple PCBs [38] (Student competition)
Katharina Scharff, Christian Morten Schierholz, Cheng Yang, Christian Schuster Hamburg University of Technology
- Live Q&A1
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Session T1B - Advanced CAD II
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- T1B.1. A Shielded-Block Preconditioner for Reduced-Domain Layered-Medium Integral-Equation Methods [131]
Chang Liu*, Ali Yilmaz+ *Cadence
+UT Austin
- T1B.2. An Efficient and Parallel Electromagnetic Solver for Complex Interconnects in Layered Media [84] (Student competition)
Piero Triverio, Damian Marek, Shashwat Sharma University of Toronto
- T1B.3. On Dissipativity Conditions for Linearized Models of Locally Active Circuit Blocks [35] (Student competition)
Tommaso Bradde*, Stefano Grivet-Talocia*, Giuseppe Carlo Calafiore*, Anton Proskurnikov*, Zohaib Mahmood+, Luca Daniel** *Politecnico di Torino,
+NanoSemi, Inc.,
**MIT
- T1B.4. Uniformly Accurate Electrostatic Layered Medium Green’s Function Approximation via Scattered Field Formulation [127] (Student competition)
Xinbo Li, Vladimir Okhmatovski University of Manitoba
- Live Q&A2
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10:20 - 10:30 am Pacific
Break
10:30 - 11:20 am Pacific
Tutorial III
11:20 - 11:30 am Pacific
Live Q&A1
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10:30 - 11:20 am Pacific
Tutorial IV
11:20 - 11:30 am Pacific
Live Q&A2
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11:30 am - 12:00 pm Pacific
IEEE EPS TC-EDMS Presentation
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Session T2A - 3D Interconnects
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- T2A.1. 3D Integration of Ka-band RFIC by Inductive Inter-chip Wireless Communication Using Figure-8 Coils [60] (Student competition)
Masahiro Usui+, Kota Shiba*, Mototsugu Hamada*, Tadahiro Kuroda* *The University of Tokyo,
+Keio University
- T2A.2. Estimating Per-Unit-Length Resistance Parameter in Emerging Copper-Graphene Hybrid Interconnects via Prior Knowledge based Accelerated Neural Networks [98] (Student competition)
Somesh Kumar*, Sourajeet Roy+, B K Kaushik +, Ramachandra Achar**, Rohit Sharma++, Rahul Kumar++, Likith Narayan S S+ *ABV-Indian Institute of Information Technology & Management,
+IIT Roorkee,
**Carleton Univeristy,
++IIT Ropar
- Live Q&A1
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Session T2B - Measurements I
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- T2B.1. A Review of 90 Degree Corner Design for High-Speed Digital and mmWave Applications [29]
Heidi Barnes+, Giovanni Bianchi*, Jose Moreira *Advantest,
+Keysight Technologies
- T2B.2. Assessment of 2x Thru De-embedding Accuracy for Package Transmission Line DUTs [77]
Stephen Smith, Zhichao Zhang, Kemal Aygun Intel Corporation
- Live Q&A2
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12:50 - 1:00 pm Pacific
Day 2 Wrap Up
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8:00 - 9:00 am Pacific
Invited Presentation - Closing the Loop from Architecture to Post-Silicon for Signal and Power Integrity
Vaishnav Srinivas
Qualcomm
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Session W1A - Signal and Thermal Integrity
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- W1A.1. Accurate BGA Package Solder Joint Modeling for High Speed SerDes Interfaces [71]
Jiwei Sun, Zhiguo Qian, Cemil S. Geyik, Kemal Aygun Intel Corporation
- W1A.2. Reinforcement Learning-based Auto-router considering Signal Integrity [110] (Student competition)
Minsu Kim, Hyunwook Park, Seongguk Kim, Keeyoung Son, Subin Kim, Kyungjune Son, Seonguk Choi, Gapyeol Park, Joungho Kim KAIST
- W1A.3. Thermal Sensitivity of Dielectric Materials in High-Speed Designs [104] (Student competition)
Sunil Pathania*, Bhyrav Mutnury+, Mallikarjun Vasa**, Vijender Kumar**, Sukumar Muthusamy**, Seema P K**, Rohit Sharma* *IIT-Ropar,
+Dell
**DellEMC
- W1A.4. A Tunable Neural Network based Decision Feed-back Equalizer model for High-speed Link Simulation [12] (Student competition)
Thong Nguyen, Jose Schutt-Aine UIUC
- Live Q&A1
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Session W1B - Novel Interconnects
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- W1B.1. Design, Simulation and Measurement of a Flexible Voltage-controlled Oscillator (VCO) Chip with Bending Radius [102]
Seungtaek Jeong*, Seongsoo Lee*, Seokwoo Hong*, Boogyo Sim*, Hyunwook Park*, Subin Kim*, Youngwoo Kim*, Keeyeong Son*, Joungho Ki*, Jaehak Lee+, Junyeop Son+ *KAIST
+Korea Institute of Machinery & Materials
- W1B.2. Cost-Effective Implementation of Air Filled Waveguides on Printed Circuit Boards [52] (Student competition)
Felix Sepaintner*, Andreas Scharl*, Johannes Jakob*, Florian Keck*, Kevin Kunze*, Franz Roehrl+, Werner Bogner*, Stefan Zorn+ *Technische Hochschule Deggendorf,
+Rohde & Schwarz
- W1B.3. A Transmission Line Coupler Component for direct B2B communications [66]
Reiji Miura, Tadahiro Kuroda, Mototsugu Hamada The University of Tokyo
- W1B.4. Causal Transmission Line Geometry Optimization for Impedance Control in PCBs [85]
Zachariah Peterson Northwest Engineering Solutions
- Live Q&A2
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10:20 - 10:30 am Pacific
Break
10:30 - 11:20 am Pacific
Tutorial V
11:20 - 11:30 am Pacific
Live Q&A
11:30 am - 12:50 pm Pacific
Session W2A - Jitter Noise in High-Speed Links
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- W2A.1. Analysis of Power Supply Noise Induced Jitter of I/O Subsystems with Multiple Power Domains [114]
Hyo-Soon Kang, Ashkan Hashemi, Guang Chen, Xiaoping Liu, Wendemagegnehu Beyene Intel
- W2A.2. An Inspection Based Method to Analyse Deterministic Noise in N-port Circuits [73] (Student competition)
Vijender Kumar Sharma+, Jai Narayan Tripathi*, Hitesh Shrimali+ *IIT Jodhpur,
+IIT Mandi
- W2A.3. Variational Inference approach to Jitter decomposition in High-speed Link [81] (Student competition)
Bobi Shi, Thong Nguyen, Jose Schutt-Aine UIUC
- W2A.4. Energy-Area Aware Channel Design for Multi-Chip Interfaces [123]
Muhammad Waqas Chaudhary*, Andy Heinig*, Bhaskar Choubey+ *Fraunhofer Institute,
+Siegen University
- Live Q&A1
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10:30 - 11:30 am Pacific
Virtual Booths
11:30 am - 12:50 pm Pacific
Session W2B - Measurements II
Session Chairs:
Kemal Aygun, Intel
Jose Hejase, Nvidia
- W2B.1. Determine Socket’s Inductance and Contact Resistance by Using PRF Method [63]
- W2B.2. Dual Sided High Frequency Measurement of Microelectronic Packages [48]
Sean Christ, Ahmet Durgun, Kemal Aygun, Michael Hill Intel
- W2B.3. SI Model to Hardware Correlation on a 44Gb/s HLGA Socket Connector [129]
Pavel Roy Paladhi+, Yanyan Zhang+, Junyan Tang+, Daniel Rodriguez+, Jose Hejase*, Sungjun Chun+, Wiren Becker+, Brian Beaman+, Daniel Dreps+, *Nvidia,
+IBM
- Live Q&A2
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12:50 - 1:00 pm Pacific
Conference Wrap-up
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